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FPGA Verification

fpga-verification is a Python library of reusable verification components, developed primarily for Intel/Altera FPGA video-processing systems. It also provides cocotb BFMs for Altera-specific protocols such as Avalon-ST and Avalon-MM, along with models for components such as DMA controllers.

The library supports verification workflows for components from:

The library provides a UVM-like testbench structure built on cocotb and pyuvm. It keeps test data, protocol conversion, reference behaviour, and simulation plumbing in separate layers. This allows the same prediction code to be reused in fast unit tests, cocotb simulations, and hardware-in-the-loop tests.

It includes:

  • cocotb helpers for Avalon-ST and Avalon-MM interfaces;
  • Intel Avalon-ST Video packet codecs and pyuvm verification components;
  • simulation runners for plain RTL, Intel components, and Platform Designer;
  • a black-box Intel DMA model and sparse byte memory;
  • stream latency and throughput measurements;
  • simulator-independent video and numeric data helpers;
  • persistent Intel System Console access for hardware-in-the-loop tests.

Note

Hardware-in-the-loop functionality is under development.

Start here

  1. Install the package.
  2. Run the minimal testbench.
  3. Follow the complete video-packet endianness tutorial.

The example preserves packet order, identifier beats, CONTROL packets and USER packets. It reverses the valid bytes within each VIDEO payload beat, including a partial final beat.

The tutorial shows how to assemble a working testbench. The architecture and modeling chapters explain why the responsibilities are separated. Focused how-to guides cover runners, interfaces, data formats, performance and hardware access.

The case studies describe reusable verification problems:

Use the generated API reference when you already know which component you need.